JPS6367702B2 - - Google Patents
Info
- Publication number
- JPS6367702B2 JPS6367702B2 JP58071086A JP7108683A JPS6367702B2 JP S6367702 B2 JPS6367702 B2 JP S6367702B2 JP 58071086 A JP58071086 A JP 58071086A JP 7108683 A JP7108683 A JP 7108683A JP S6367702 B2 JPS6367702 B2 JP S6367702B2
- Authority
- JP
- Japan
- Prior art keywords
- bus
- data processing
- lock
- processing unit
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Multi Processors (AREA)
- Bus Control (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7108683A JPS59195728A (ja) | 1983-04-22 | 1983-04-22 | デ−タ処理装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7108683A JPS59195728A (ja) | 1983-04-22 | 1983-04-22 | デ−タ処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59195728A JPS59195728A (ja) | 1984-11-06 |
JPS6367702B2 true JPS6367702B2 (en]) | 1988-12-27 |
Family
ID=13450362
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7108683A Granted JPS59195728A (ja) | 1983-04-22 | 1983-04-22 | デ−タ処理装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59195728A (en]) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61198355A (ja) * | 1985-02-28 | 1986-09-02 | Toshiba Corp | マルチプロセツサシステム |
JPH04310165A (ja) * | 1991-04-09 | 1992-11-02 | Nec Corp | バスロック制御機構 |
JPH06314232A (ja) * | 1993-05-06 | 1994-11-08 | Mitsubishi Electric Corp | メモリ切替制御回路 |
US6107637A (en) | 1997-08-11 | 2000-08-22 | Hitachi, Ltd. | Electron beam exposure or system inspection or measurement apparatus and its method and height detection apparatus |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5326783B2 (en]) * | 1972-08-26 | 1978-08-04 |
-
1983
- 1983-04-22 JP JP7108683A patent/JPS59195728A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS59195728A (ja) | 1984-11-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20040107265A1 (en) | Shared memory data transfer apparatus | |
JPH02109153A (ja) | プロセッサ間データ伝送方式 | |
JPH03189843A (ja) | データ処理システムおよび方法 | |
JPS6367702B2 (en]) | ||
JPS6074174A (ja) | メモリ・アクセス方式 | |
JPS6391766A (ja) | 記憶装置アクセス制御方式 | |
JPS60201453A (ja) | 記憶装置アクセス制御方式 | |
JP3057754B2 (ja) | メモリ回路および分散処理システム | |
US6295477B1 (en) | Bus coupler between a system bus and a local bus in a multiple processor data processing system | |
JPS6217879Y2 (en]) | ||
JPH05120207A (ja) | デ−タ転送方式 | |
JPS6211753B2 (en]) | ||
JP2821176B2 (ja) | 情報処理装置 | |
JP2884943B2 (ja) | アドレス調停回路 | |
JP2576236B2 (ja) | プログラマブルコントローラの通信方法 | |
JPS62145345A (ja) | 直接メモリアクセス間隔制御方式 | |
JPH0652516B2 (ja) | バス・インターフェース装置 | |
JPH0113570B2 (en]) | ||
JPH02211571A (ja) | 情報処理装置 | |
JPS6068461A (ja) | メモリ多重アクセス装置 | |
JPH0461388B2 (en]) | ||
EP0369935A2 (en) | Multiple posting cache memory | |
JPH0572619B2 (en]) | ||
JPS63288351A (ja) | メモリ・ブロックの書き込み、読み出し回路 | |
JPS61120262A (ja) | メモリ間インテリジエントdma制御装置 |